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cystech electronics corp. spec. no. : c945q8 issued date : 2014.01.03 revised date : page no. : 1/12 MTD120C10KQ8 cystek product specification n- and p-channel logic level enhancement mode mosfet MTD120C10KQ8 description the MTD120C10KQ8 consists of a n-channel and a p-channel enhancement-mode mosfet in a single sop-8 package, providing the designer with the best combination of fast sw itching, ruggedized device design, low on-resistance and cost-effectiveness. the sop-8 package is universally preferred for all commercial-industrial surface mount applications. features ? simple drive requirement ? low on-resistance ? fast switching speed ? esd protected gate ? pb-free lead plating and halogen-free package equivalent circuit outline ordering information device package shipping MTD120C10KQ8-0-t3-g sop-8 (pb-free lead plating & halogen-free package) 2500 pcs / tape & reel MTD120C10KQ8 sop-8 g gate s source d drain n-ch p-ch bv dss 100v -100v i d 2.4a -2.8a r dson(typ.) 124m 102m environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t3 : 2500 pc s / tape & reel, 13? reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c945q8 issued date : 2014.01.03 revised date : page no. : 2/12 MTD120C10KQ8 cystek product specification absolute maximum ratings (t c =25 c, unless otherwise noted) limits parameter symbol n-channel p-channel unit drain-source breakdown voltage bv dss 100 -100 gate-source voltage v gs 20 20 v t a =25 c, v gs =10v (-10v) 2.4 -2.8 continuous drain current (note 2) t a =70 c, v gs =10v (-10v) i d 1.9 -2.2 pulsed drain current (note 1) i dm 12 -14 a power dissipation for dual operation 2 1.6 (note 2) power dissipation for single operation p d 0.9 (note 3) w operating junction and storage temperature range tj; tstg -55~+150 c thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 40 c/w 78 (note 2) c/w thermal resistance, junction-to-ambient, max r th,j-a 135 (note 3) c/w note : 1.pulse width limited by maximum juncti on temperature. 2.surface mounted on 1 in2 copper pad of fr-4 board, pulse width 10s. 3.surface mounted on minimum copper pad, pulse width 10s. n-channel electrical characteristics (tc=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 100 - - v v gs =0v, i d =250 a v gs(th) 1.0 1.5 2.5 v v ds =v gs , i d =250 a i gss - - 10 v gs =20v, v ds =0v - - 1 v ds =80v, v gs =0v i dss - - 25 a v ds =70v, v gs =0v, tj=125 c - 124 150 i d =2a, v gs =10v *r ds(on) - 132 160 m i d =1.5a, v gs =4.5v *g fs - 5.9 - s v ds =10v, i d =2a dynamic ciss - 306 - coss - 42 - crss - 16 - pf v ds =20v, v gs =0, f=1mhz *td (on) - 6 - *tr - 7 - *td (off) - 29 - *tf - 13 - ns v ds =50v, i d =1a, v gs =10v, r g =6 *qg - 9 - *qgs - 1 - *qgd - 2.6 - nc v ds =80v, i d =2.4a, v gs =10v
cystech electronics corp. spec. no. : c945q8 issued date : 2014.01.03 revised date : page no. : 3/12 MTD120C10KQ8 cystek product specification body diode *v sd - 0.79 1.3 v v gs= 0v, i s =2a *i s - - 2.4 *i sm - - 12 a *pulse test : pulse width 300 s, duty cycle 2% p-channel electrical characteristics (tc=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss -100 - - v gs =0v, i d =-250 a v gs(th) -1.0 -1.9 -2.5 v v ds =vgs, i d =-250 a i gss - - 10 v gs =20v, v ds =0v - - -1 v ds =-80v, v gs =0v i dss - - -25 a v ds =-70v, v gs =0v, tj=125 c - 102 130 i d =-2a, v gs =-10v *r ds(on) - 122 150 m i d =-1.5a, v gs =-4.5v *g fs - 6.7 - s v ds =-10v, i d =-2a dynamic ciss - 1243 - coss - 126 - crss - 59 - pf v ds =-20v, v gs =0, f=1mhz *td (on) - 22 - *tr - 10 - *td (off) - 45 - *tf - 16 - ns v ds =-50v, i d =-1a, v gs =-10v, r g =6 *qg - 25 - *qgs - 3.4 - *qgd - 7.7 - nc v ds =-80v, i d =-2.8a, v gs =-10v body diode *v sd - -0.75 -1.3 v v gs =0v, i s =-2a *i s - - -2.8 *i sm - - -14 a *pulse test : pulse width 300 s, duty cycle 2% recommended soldering footprint
cystech electronics corp. spec. no. : c945q8 issued date : 2014.01.03 revised date : page no. : 4/12 MTD120C10KQ8 cystek product specification typical characteristics : q1( n-channel ) typical output characteristics 0 2 4 6 8 10 12 01234 5 brekdown voltage vs ambient temperature 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v v ds , drain-source voltage(v) i d , drain current (a) 10v 9v 8v 7v 6v 5v 4v v gs =3v static drain-source on-state resistance vs drain current 100 1000 10000 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =3v v gs =2.5v v gs =4.5v v gs =10v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 024681 i dr , reverse drain current(a) v sd , source-drain voltage(v) static drain-source on-state resistance vs gate-source voltage 40 80 120 160 200 240 280 320 024681 0 0 tj=25c tj=150c v gs =0v drain-source on-state resistance vs junction tempearture 0.4 0.8 1.2 1.6 2 2.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =10v, i d =2a r dson @tj=25c : 124 m typ. v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =2a
cystech electronics corp. spec. no. : c945q8 issued date : 2014.01.03 revised date : page no. : 5/12 MTD120C10KQ8 cystek product specification typical characteristics(cont.) : q1( n-channel) capacitance vs drain-to-source voltage 10 100 1000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a i d =1ma forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 i d , drain current(a) g fs , forward transfer admittance(s) v ds =10v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 0246810 qg, total gate charge(nc) v gs , gate-source voltage(v) i d =2.4a v ds =50v v ds =80v maximum safe operating area 0.001 0.01 0.1 1 10 100 0.1 1 10 100 1000 v ds , drain-source voltage(v) i d , drain current(a) t a =25c, tj=150c v gs =10v, ja =78c/w single pulse dc 100ms r dson limited 100 s 10ms 1ms 1s maximum drain current vs junction temperature 0 0.5 1 1.5 2 2.5 3 25 50 75 100 125 150 175 tj, junction temperature(c) i d , maximum drain current(a) t a =25c v gs =10v r ja =78c/w
cystech electronics corp. spec. no. : c945q8 issued date : 2014.01.03 revised date : page no. : 6/12 MTD120C10KQ8 cystek product specification typical characteristics(cont.) : q1( n-channel) typical transfer characteristics 0 2 4 6 8 10 12 012345 v gs , gate-source voltage(v) i d , drain current(a) v ds =10v single pulse power rating, junction to ambient (note on page 2) 0.1 1 10 100 1000 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width(s) power (w) t j( max) =150c t a =25c ja =78c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t1/t2 3.t jm -t a =p dm *r ja (t) 4.r ja =78c/w
cystech electronics corp. spec. no. : c945q8 issued date : 2014.01.03 revised date : page no. : 7/12 MTD120C10KQ8 cystek product specification typical characteristics : q2( p-channel) typical output characteristics 0 2 4 6 8 10 12 14 01234 5 brekdown voltage vs ambient temperature 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -bv dss , normalized drain-source breakdown voltage -i d =250 a, v gs =0v -v ds , drain-source voltage(v) -i d , drain current (a) 10v 9v 8v 7v 6v 5v 4v -v gs =3v static drain-source on-state resistance vs drain current 10 100 1000 10000 0.01 0.1 1 10 100 -i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) -v gs =3v -v gs =4.5v -v gs =10v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 02468 -i dr , reverse drain current(a) -v sd , source-drain voltage(v) static drain-source on-state resistance vs gate-source voltage 40 80 120 160 200 240 280 320 360 400 024681 0 10 tj=25c tj=150c v gs =0v drain-source on-state resistance vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance -v gs =10v, -i d =2a r dson @tj=125c : 102m typ. -v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) -i d =2a
cystech electronics corp. spec. no. : c945q8 issued date : 2014.01.03 revised date : page no. : 8/12 MTD120C10KQ8 cystek product specification typical characteristics(cont.) : q2(p-channel) capacitance vs drain-to-source voltage 10 100 1000 10000 0.1 1 10 100 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.2 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -v gs(th) , normalized threshold voltage -i d =250 a -i d =1ma forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 -i d , drain current(a) g fs , forward transfer admittance(s) -v ds =10v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 0 4 8 12 16 20 24 28 qg, total gate charge(nc) -v gs , gate-source voltage(v) i d =-2.8a v ds =-50v v ds =-80v maximum safe operating area 0.001 0.01 0.1 1 10 100 0.1 1 10 100 1000 -v ds , drain-source voltage(v) -i d , drain current(a) t a =25c, tj=150c v gs =10v, ja =78c/w single pulse dc r dson limited 100 s 1ms 10ms 100ms 1s maximum drain current vs junction temperature 0 0.5 1 1.5 2 2.5 3 3.5 25 50 75 100 125 150 175 tj, junction temperature(c) -i d , maximum drain current(a) t a =25c -v gs =10v r ja =78c/w
cystech electronics corp. spec. no. : c945q8 issued date : 2014.01.03 revised date : page no. : 9/12 MTD120C10KQ8 cystek product specification typical characteristics(cont.) : q2(p-channel) typical transfer characteristics 0 2 4 6 8 10 12 012345 -v gs , gate-source voltage(v) -i d , drain current(a) -v ds =10v single pulse power rating, junction to ambient (note on page 2) 0.1 1 10 100 1000 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width(s) power (w) t j( max) =150c t a =25c ja =78c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t1/t2 3.t jm -t a =p dm *r ja (t) 4.r ja =78c/w
cystech electronics corp. spec. no. : c945q8 issued date : 2014.01.03 revised date : page no. : 10/12 MTD120C10KQ8 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c945q8 issued date : 2014.01.03 revised date : page no. : 11/12 MTD120C10KQ8 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c945q8 issued date : 2014.01.03 revised date : page no. : 12/12 MTD120C10KQ8 cystek product specification sop-8 dimension marking: 8-lead sop-8 plastic package cystek packa g e code: q8 top view a b front view f c d e g part a i h j k o m l n right side view part a date code device name d120 c10k *: typical inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.1909 0.2007 4.85 5.10 i 0.0019 0.0078 0.05 0.20 b 0.1515 0.1555 3.85 3.95 j 0.0118 0.0275 0.30 0.70 c 0.2283 0.2441 5.80 6.20 k 0.0074 0.0098 0.19 0.25 d 0.0480 0.0519 1.22 1.32 l 0.0145 0.0204 0.37 0.52 e 0.0145 0.0185 0.37 0.47 m 0.0118 0.0197 0.30 0.50 f 0.1472 0.1527 3.74 3.88 n 0.0031 0.0051 0.08 0.13 g 0.0570 0.0649 1.45 1.65 o 0.0000 0.0059 0.00 0.15 h 0.1889 0.2007 4.80 5.10 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .

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